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	<title>Comments on: Artificial neural network renaissance?</title>
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	<link>http://www.vetta.org/2006/09/artificial-neural-network-renaissance/</link>
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		<title>By: mathemajician</title>
		<link>http://www.vetta.org/2006/09/artificial-neural-network-renaissance/comment-page-1/#comment-37</link>
		<dc:creator>mathemajician</dc:creator>
		<pubDate>Fri, 29 Sep 2006 08:58:11 +0000</pubDate>
		<guid isPermaLink="false">http://www.vetta.org/?p=8#comment-37</guid>
		<description>I think the key thing is that the computation model is moving away from the classical von Neumann architecture towards a more distributed model.  That is a problem for inherently serial tasks, but for naturally parallel tasks, which includes various things in AI, it&#039;s really great news.</description>
		<content:encoded><![CDATA[<p>I think the key thing is that the computation model is moving away from the classical von Neumann architecture towards a more distributed model.  That is a problem for inherently serial tasks, but for naturally parallel tasks, which includes various things in AI, it&#8217;s really great news.</p>
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		<title>By: David</title>
		<link>http://www.vetta.org/2006/09/artificial-neural-network-renaissance/comment-page-1/#comment-36</link>
		<dc:creator>David</dc:creator>
		<pubDate>Thu, 28 Sep 2006 23:20:36 +0000</pubDate>
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		<description>A very interesting development. From my post yesterday on the AGI list:

&lt;blockquote&gt;It&#039;s my understanding that NM (and probably the whole class of similar AGI architectures) is largely memory-performance limited due to the nature of processes which continuously iterate over large portions of system memory.

What NM-like AGI architectures really need is a 10x-1000x memory performance improvement, moreso than processor horsepower growth. On-die system memory with SRAM performance would fit the bill. The future looks promising, as more transistors squeeze onto chips, the industry is moving to modular microarchitecture approaches to reduce overall design complexity, and such an approach will make possible cheap[er] specialized chips such as those dedicating 90% of transistors to memory and 10% to processor cores.&lt;/blockquote&gt;

I think the next 5-10 years of microarchitecture design will be a fun ride; we&#039;ll see radical change from decades-old practices which will bring some wild stuff... then comes spintronics -- pushing around electrons is so 20th century!</description>
		<content:encoded><![CDATA[<p>A very interesting development. From my post yesterday on the AGI list:</p>
<blockquote><p>It&#8217;s my understanding that NM (and probably the whole class of similar AGI architectures) is largely memory-performance limited due to the nature of processes which continuously iterate over large portions of system memory.</p>
<p>What NM-like AGI architectures really need is a 10x-1000x memory performance improvement, moreso than processor horsepower growth. On-die system memory with SRAM performance would fit the bill. The future looks promising, as more transistors squeeze onto chips, the industry is moving to modular microarchitecture approaches to reduce overall design complexity, and such an approach will make possible cheap[er] specialized chips such as those dedicating 90% of transistors to memory and 10% to processor cores.</p></blockquote>
<p>I think the next 5-10 years of microarchitecture design will be a fun ride; we&#8217;ll see radical change from decades-old practices which will bring some wild stuff&#8230; then comes spintronics &#8212; pushing around electrons is so 20th century!</p>
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